名称:自动售货机设计VHDL代码Quartus仿真
软件:Quartus
语言:VHDL
代码功能:
自动售货机
一台售货机:售货机中有一种商品(价格10元)
1、当顾客取消购买时退钱;
2、当顾客刚好放入10元并确定时吐出商品;
3、当顾客放入5元时等待继续投币;
4、当顾客放入15元且确定时吐出商品并找零。
在quartus II上用vhdl语言
FPGA代码Verilog/VHDL代码资源下载:www.hdlcode.com
演示视频:
设计文档:
1. 工程文件
2. 程序文件
3. 程序编译
4. RTL图
5. 仿真图
整体仿真图
按键模块仿真图
控制模块仿真图
显示模块仿真图
部分代码展示:
LIBRARY?ieee; ???USE?ieee.std_logic_1164.all; --顶层模块 ENTITY?auto_sell?IS ???PORT?( ??????clk_in????????:?IN?STD_LOGIC;--时钟 ??????reset_n???????:?IN?STD_LOGIC;--复位 ??????confirm_key_n??:?IN?STD_LOGIC;--确认按键 ??????cancel_key_n???:?IN?STD_LOGIC;--取消按键 ??????coin_5_n???????:?IN?STD_LOGIC;--投币5元 coin_10_n??????:?IN?STD_LOGIC;--投币10元 ??????buy_succeed????:?OUT?STD_LOGIC;--购买成功 ??????bit_select?????:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0);--数码管位选 ??????seg_select?????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)--数码管段选 ???); END?auto_sell; ARCHITECTURE?bahave?OF?auto_sell?IS --售货控制模块 component?sell_ctrl?IS ???PORT?( ??????clk????????????:?IN?STD_LOGIC; ??????reset_n????????:?IN?STD_LOGIC; ??????confirm_p??????:?IN?STD_LOGIC; ??????concel_p???????:?IN?STD_LOGIC; ??????coin_5_p???????:?IN?STD_LOGIC; coin_10_p??????:?IN?STD_LOGIC;--投币10元 ??????buy_succeed????:?OUT?STD_LOGIC; ??????input_money????:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0); ??????refound_money??:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0) ???); END?component; --按键下降沿检测模块 component?key_jitter?IS ???PORT?( ??????clkin????????:?IN?STD_LOGIC; ??????key_in???????:?IN?STD_LOGIC; ??????key_negedge??:?OUT?STD_LOGIC ???); END?component; --显示模块 component?display?IS ???PORT?( ??????clk????????????:?IN?STD_LOGIC; ??????input_money????:?IN?STD_LOGIC_VECTOR(3?DOWNTO?0); ??????refound_money??:?IN?STD_LOGIC_VECTOR(3?DOWNTO?0); ??????bit_select?????:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0); ??????seg_select?????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0) ???); END?component; ???SIGNAL?input_money???????:?STD_LOGIC_VECTOR(3?DOWNTO?0); ???SIGNAL?refound_money?????:?STD_LOGIC_VECTOR(3?DOWNTO?0);??? SIGNAL?coin_5_p:?STD_LOGIC; SIGNAL?coin_10_p:?STD_LOGIC; ???SIGNAL?confirm_p?????????:?STD_LOGIC; ???SIGNAL?concel_p??????????:?STD_LOGIC; ???SIGNAL?buy_succeed_buf?:?STD_LOGIC; ???SIGNAL?bit_select_buf??:?STD_LOGIC_VECTOR(3?DOWNTO?0); ???SIGNAL?seg_select_buf??:?STD_LOGIC_VECTOR(7?DOWNTO?0); BEGIN ???buy_succeed?<=?buy_succeed_buf; ???bit_select?<=?bit_select_buf; ???seg_select??clk_in, ?????????key_in???????=>?confirm_key_n, ?????????key_negedge??=>?confirm_p ??????); ??? ??? --按键下降沿检测模块?? ???i2_key_jitter?:?key_jitter ??????PORT?MAP?( ?????????clkin????????=>?clk_in, ?????????key_in???????=>?cancel_key_n, ?????????key_negedge??=>?concel_p ??????); ??? --按键下降沿检测模块 ???i3_key_jitter?:?key_jitter ??????PORT?MAP?( ?????????clkin????????=>?clk_in, ?????????key_in???????=>?coin_5_n, ?????????key_negedge??=>?coin_5_p ??????);
点击链接获取代码文件:http://www.hdlcode.com/index.php?m=home&c=View&a=index&aid=1310
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