名称:简易波形发生器VHDL代码Quartus仿真
软件:Quartus
语言:VHDL
代码功能:
简易波形发生器
2、通过开关控制输出哪种类型。
FPGA代码Verilog/VHDL代码资源下载:www.hdlcode.com
演示视频:
设计文档:
1. 工程文件
2. 程序文件
3. 原理图
4. 程序编译
5. RTL图
6. 仿真图
部分代码展示:
LIBRARY?ieee; ???USE?ieee.std_logic_1164.all; ???USE?ieee.std_logic_unsigned.all; ENTITY?wave_generation?IS ???PORT?( ??????sys_clk?????????:?IN?STD_LOGIC;--输入时钟???? ??????wave_select?????:?IN?STD_LOGIC_VECTOR(1?DOWNTO?0);--波形选择 ??????wave_data?????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)--波形输出 ???); END?wave_generation; ARCHITECTURE?behaviour?OF?wave_generation?IS ???--波形发生模块 COMPONENT?carrier_wave?IS ??????PORT?( ?????????clk?????????????:?IN?STD_LOGIC; ?????????triangular_wave?:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0); ?????????square_wave?????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0); ?????????sin_wave????????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0) ??????); ???END?COMPONENT; --3选1模块,00输出0;01-方波;10-三角波;11-正弦波,wave_select控制3选1 COMPONENT?MUX_31?IS ???PORT?( ?????????triangular_wave?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0); ?????????square_wave?????:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0); ?????????sin_wave????????:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0); ?????????wave_select?????:?IN?STD_LOGIC_VECTOR(1?DOWNTO?0); ?????????wave_data???????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)--波形输出 ???); END?COMPONENT; ???SIGNAL?triangular_wave???:?STD_LOGIC_VECTOR(7?DOWNTO?0); ???SIGNAL?square_wave?????:?STD_LOGIC_VECTOR(7?DOWNTO?0); ???SIGNAL?sin_wave????????:?STD_LOGIC_VECTOR(7?DOWNTO?0); BEGIN
点击链接获取代码文件:http://www.hdlcode.com/index.php?m=home&c=View&a=index&aid=564
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