软件:Quartus
语言:Verilog
代码功能:
19位全加器
1、设计1位全加器
2、例化19个1位全加器组成19位全加器
FPGA代码Verilog/VHDL代码资源下载:www.hdlcode.com
演示视频:
设计文档:
19位全加器仿真
1.工程文件
2.程序文件
3.程序编译
4.程序结构(RTL图)
5.程序仿真
Testbench
十进制表示
部分代码展示:
//19位全加器 //设计方法:先设计1位全加器,再将19个1位全加器级联 module?ADDR(add_a,add_b,add_cin,sum_out,cout_out); //add_a+add_b+add_cin=sum_out?and?cout_out; input?[18:0]?add_a;//加数a input?[18:0]?add_b;//加数b input?add_cin;//加数进位 output?[18:0]?sum_out;//和 output?cout_out;//和进位 wire??[17:0]wire_count;//进位信号 //19个1位全加器级联 ALL_ADDER?add0(.a(add_a[0]),.b(add_b[0]),.cin(add_cin),.sum(sum_out[0]),.cout(wire_count[0])); ALL_ADDER?add1(.a(add_a[1]),.b(add_b[1]),.cin(wire_count[0]),.sum(sum_out[1]),.cout(wire_count[1])); ALL_ADDER?add2(.a(add_a[2]),.b(add_b[2]),.cin(wire_count[1]),.sum(sum_out[2]),.cout(wire_count[2])); ALL_ADDER?add3(.a(add_a[3]),.b(add_b[3]),.cin(wire_count[2]),.sum(sum_out[3]),.cout(wire_count[3])); ALL_ADDER?add4(.a(add_a[4]),.b(add_b[4]),.cin(wire_count[3]),.sum(sum_out[4]),.cout(wire_count[4])); ALL_ADDER?add5(.a(add_a[5]),.b(add_b[5]),.cin(wire_count[4]),.sum(sum_out[5]),.cout(wire_count[5])); ALL_ADDER?add6(.a(add_a[6]),.b(add_b[6]),.cin(wire_count[5]),.sum(sum_out[6]),.cout(wire_count[6])); ALL_ADDER?add7(.a(add_a[7]),.b(add_b[7]),.cin(wire_count[6]),.sum(sum_out[7]),.cout(wire_count[7])); ALL_ADDER?add8(.a(add_a[8]),.b(add_b[8]),.cin(wire_count[7]),.sum(sum_out[8]),.cout(wire_count[8])); ALL_ADDER?add9(.a(add_a[9]),.b(add_b[9]),.cin(wire_count[8]),.sum(sum_out[9]),.cout(wire_count[9])); ALL_ADDER?add10(.a(add_a[10]),.b(add_b[10]),.cin(wire_count[9]),.sum(sum_out[10]),.cout(wire_count[10])); ALL_ADDER?add11(.a(add_a[11]),.b(add_b[11]),.cin(wire_count[10]),.sum(sum_out[11]),.cout(wire_count[11])); ALL_ADDER?add12(.a(add_a[12]),.b(add_b[12]),.cin(wire_count[11]),.sum(sum_out[12]),.cout(wire_count[12])); ALL_ADDER?add13(.a(add_a[13]),.b(add_b[13]),.cin(wire_count[12]),.sum(sum_out[13]),.cout(wire_count[13])); ALL_ADDER?add14(.a(add_a[14]),.b(add_b[14]),.cin(wire_count[13]),.sum(sum_out[14]),.cout(wire_count[14])); ALL_ADDER?add15(.a(add_a[15]),.b(add_b[15]),.cin(wire_count[14]),.sum(sum_out[15]),.cout(wire_count[15])); ALL_ADDER?add16(.a(add_a[16]),.b(add_b[16]),.cin(wire_count[15]),.sum(sum_out[16]),.cout(wire_count[16])); ALL_ADDER?add17(.a(add_a[17]),.b(add_b[17]),.cin(wire_count[16]),.sum(sum_out[17]),.cout(wire_count[17])); ALL_ADDER?add18(.a(add_a[18]),.b(add_b[18]),.cin(wire_count[17]),.sum(sum_out[18]),.cout(cout_out));
点击链接获取代码文件:http://www.hdlcode.com/index.php?m=home&c=View&a=index&aid=1239
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