AB类CMOS PA经典论文

caroline11

This report details the design process of a RF CMOS Power Amplifier (PA) designed in a standard CMOS process. The Power Amplifier was
designed for the Digital European Cordless Telephone (DECT) Standard, which has a transmit frequency of 1.9 GHz and requires a peak output power of 250mW. The process of designing this PA required a survey of different methods of PA implementation, after which a CMOS PA was designed. We designed a differential Class AB CMOS PA in a 0.6?m standard CMOS process which could generate 250mW of output power into a 50? load. The design utilized high-Q bondwires as tuning elements and utilized a cascode structure in order to reduce the effective capacitance seen in the circuit and to reduce the voltage stress on the gate oxide. The circuit was designed and layout was completed, and post-layout simulations indicated a peak efficiency of 31.1% in the PA。