pipaline adc design thesis

caroline11

Power dissipation is becoming an increasingly important issue in the design of analog to digital converters as signal processing systems move into applications requiring either portability, or as in the case of some telecommunications applications, a high degree of parallelism. This research focuses on minimizing power dissipation in high resolution pipelined analog to digital converters,
which are needed in applications requiring both high data rates and high resolution, such as medical imaging, high data rate digital radio receivers, and in some telecommunications systems. Power dissipation was minimized in this research through the appropriate choice of the per stage resolution, optimizing the distribution of the thermal noise budget among the various stages of the pipeline, the appropriate choice of opamp architecture, and through optimal sizing of opamps。